FSMC Memory Issue

[blue_dolphin1987]

Posted on April 02, 2013 at 08:24

Hi ,

I am testing out the following file ,GLCD_16bitIF_STM32F2xx.c from KEIL

#define LCD_BASE (0x60000000UL | 0x00000000UL)
#define LCD_REG16 (*((volatile unsigned short *)( LCD_BASE )))
#define LCD_DAT16 (*((volatile unsigned short *)(LCD_BASE+2)))
#define BG_COLOR 0 /* Background color */
#define TXT_COLOR 1 /* Text color */
/*---------------------------- Global variables ------------------------------*/
/******************************************************************************/
static volatile unsigned short Color[2] = {White, Black};
static unsigned char Himax;
/************************ Local auxiliary functions ***************************/
/*******************************************************************************
* Delay in while loop cycles *
* Parameter: cnt: number of while cycles to delay *
* Return: *
*******************************************************************************/
static void delay (int cnt) {
cnt <<= DELAY_2N;
while (cnt--);
}
/*******************************************************************************
* Write a command the LCD controller *
* Parameter: cmd: command to be written *
* Return: *
*******************************************************************************/
static __inline void wr_cmd (unsigned char cmd) {
LCD_REG16 = cmd;
}
/*******************************************************************************
* Write data to the LCD controller *
* Parameter: dat: data to be written *
* Return: *
*******************************************************************************/
static __inline void wr_dat (unsigned short dat) {
LCD_DAT16 = dat;
}

However , i do not understand why the memory allocation is as such #define LCD_BASE (0x60000000UL | 0x00000000UL) #define LCD_REG16 (*((volatile unsigned short *)( LCD_BASE ))) #define LCD_DAT16 (*((volatile unsigned short *)(LCD_BASE+2))) I understand that (0x60000000UL | 0x00000000UL) is the bank selection ,howeverwhy is LCD_REG16 &LCD_DAT16 at byte 0 and 2 positionrespectively. Thanks. #fsmc

[Tesla DeLorean]

Posted on April 02, 2013 at 15:26

Because presumably the LCD has it's register control pin wired to A0 externally (A1 internally, w/16-bit bus). Review the schematic for your unspecified board.

[jpeacock2399]

Posted on April 02, 2013 at 15:47

The LCD controller is configured for a 16-bit bus, so the A0 address line is decoded by the FSMC as the byte lane selects rather than an actual address.  The controller register space is in 16-bit half-words and must be addressed in even half-word boundaries, so A1 becomes the lowest address pin.  The LCD controller isn't byte addresable and doesn;t recognize the byte lane signals decoded from A0.

If you dig deep into the FSMC section of the reference manual you'll find an explanation of this.   Jack Peacock