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I am usi the IDLE event functionality of UART with HAL_UARTEx_ReceiveToIdle_IT() on an STM32G473QET6 controller. Is there a way to change the idle timeout using STM32CubeMX, or are there alternative methods to modify this setting?
Hi,I'm currently working on the STM32G491 board and implementing CAN communication. With the system clock configured using PLL at 80 MHz, I have set up the CAN peripheral with the following parameters: hfdcan1.Init.NominalPrescaler = 10; hfdcan...
Dear ST trams,I am using STM32H750 for a project. In the STM32CubeMX, I configured two ADCs in Dual regular simultaneous mode only. Also I am using DMA and a timer for trigger. I have activated 6 channel for each ADC. The sequencing of channels is as...
Hi everyone,I'm having trouble flashing my STM32 microcontroller using an ST-Link V2. STM32CubeProgrammer detects the target voltage, but it fails to connect to the MCU. Here's a summary of my setup and what I've tried:Setup:Microcontroller: STM32H72...
How do I configure the DFDSM peripheral using CubeMX?I do know about the application note AN4990 and have read it. I also saw this threadhttps://community.st.com/t5/stm32cubemx-mcus/stm32h753-stpms2l-dfsdm-pt100-example-using-stm32cubemx/td-p/172652a...
Hi,I am trying to establish a successful transfer using SPI in master full duplex DMA mode using a NUCLEO-H7S3L8 board (STM32H7RSxx family)..The runs and SPI data can be seen from the MOSI pins, but with one problem: data is not successfully sent.In ...
I'm designing a custom PCB with STM32U545NEY6Q and I don't need to use the SMPS, only the LDO. I'm not sure how to connect the SMPS, I found a post about the STM32H745IIT6, and followed the same procedure, but should I do that? I followed the datashe...
So i'm working on a way to generate pulses with both Timer 1 and 8 (advanced motor control timer) independently in OPM PWM mode 2 with the Slave Gated mode to control a each a stepper motor driver. I want to use as much as possible the hardware becau...
I've setup the FMC peripheral of an STM32H7 to read registers from an FPGA by creating a faux SRAM interface on the FPGA. This works just fine so long as the FPGA has no issues but if, say, the FPGA is unprogrammed or the FPGA data bus gets hung, th...
In the STM32F407 DS, ADC characteristics table has the following footnotes:IMO 2. follows from 3. (which is a more stringent requirement); thus 2. is redundant and confusing.JW
