OctoSPI and OctoSPIM: can you mix and match the data ports ?

[Spaced Cowboy]

Trying to design a custom board, and the OctoSPI pins are spread around the chip, but the data sheet puts some pretty stringent requirements for length matching on the DQ/DQS pins: 25 mils for RWDS to DQ[x] - and RWDS really ought to be in the middle of the DQ range as well.

In STM32CubeMX, I can set the pins "creatively" for OCTOSPI1, using a combination of ports 1 and 2, thus:

... which at least puts the DQ/CLK lines close together although DQS is still relatively out in the boonies, and NCS is geographically remote (though it has a length-match of 1.5" from CLK) ...

 

The question is, is this a valid configuration ? I'd assume so (otherwise I'd hope MX wouldn't let me do it) and the entire purpose of OCTOSPIM would seem to be to facilitate this, but before I actually pay for a board to be made, I thought I'd check...

Any help gratefully appreciated :)

[ChahinezC · Accepted solution]

Hello @Spaced Cowboy​;

The OCTOSPI I/O manager is a low-level interface that enables an efficient OCTOSPI pin assignment with a full I/O matrix (before alternate function map) and multiplex of single/dual/quad/octal SPI interfaces over the same bus.

The OCTOSPIM supports up to two single/dual/quad/octal SPI interfaces and up to two ports for pin assignment.

I recommend you checking the 5.2.2 Use case description section of the AN5050 to have more details of the use case of the OCTOSPIM.

Regards,

Chahinez.