STM32H7B0 ADC 2 incorrect sample rate.

[OGhis]

Dear,

Using STM32H0B0, 100 pins version.

we wish to sample 1 input with ADC2 at a fixed frequency. This must not deviate and for this we use timer 3 set to the desired sample rate.

In the pictures we use 100Khz, but later to go to 1Msps.

So the timer 3 is going to trigger the ADC2 to take a sample each time and the results are written to the memory via a circulating DMA. The size of the buffer is currently fixed at 4096 samples. Each time a cycle of 4096 samples is reached it is moved to external memory.

The settings of timer 3 are correct and controlled by toggling a GPIO port with the interrupt callback.

Now if we apply a sine signal of 5 Khz at a samplerate of 100Khz we would assume that every 20 samples a full sine has been run through.

This is not the case in our case. It does this every 6 to 7 samples.
So what could we have misconfigured?

[OGhis · Accepted solution]

Dear,

The issue found.
The problem was with the debugger.
If one stopped the MCU with the debugger then the DMA continued for a while and adc samples were still overwritten in the buffer.
This created incorrect samples.
By enlarging the DMA driven buffer, this issue is partially solved.