Bits 6:4 OC1M: Output compare 1 mode (Frozen - The comparison between the output compare register)
The output of TIMX_CH1 and TIMx_CH1N is decided by previous value before bits 6:4 changed to Frozen mode?
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The output of TIMX_CH1 and TIMx_CH1N is decided by previous value before bits 6:4 changed to Frozen mode?
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