Resolved! NUCLEO-C5A3ZG STM32C5 QSPI Display Bring up Project
This project tests the STM32C5's XSPI capability to drive QSPI display using the NUCLEO-C5A3ZG M.2/SerialMem connector. GitHub - stm32-hotspot/STM32C5-M2-Serial-Mem-QSPI-Display · GitHub
STM32 MCUs Boards and hardware tools
Ask questions and find answers on STM32 hardware set-ups, including schematic-related challenges, debugging probes, power configurations, and more.
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Problem with B-STLINK-ISOL board
Dear ST Team,We are having some problems using the B-STLINK-ISOL board. In our test jiga we use a STLINK-V3SET(MB1441) programmer. To isolate the programmer from the products we decided using the B-STLINK-ISOL. After attaching the B-STLINK-ISOL to th...
Resolved! How to protect pin from high voltage ('disconnect' pin)
What is the best way to protect pin from external 'high' voltage (10-30-60 or higher V). Is it even possible without external buffer, resistor + clamping diodes etc.?Input with high Z, open drain, other methd for "disconnecting" pin will do the job...
How should I do a power cycle?
Which Pin should I set and reset to make a power cycle happen in STM3G4 or any popular STM32F3xxx.. ??I have 2 mcu's and with one of it I want to do a power cycle..I mean to remove the power and connect it again. What should I do here?
No connection with ST link /V2 after setting read protection option 1
Hi,I tried to set the read protection to level 1 (the one where we should be able to wipe out everything) .But after that i can't get no connection anymore with STM32IDE , ST-link or any tool. Connection is completely broke.Before changing this level...
Resolved! STM32L4P5-DK with Quad SPI RAM, do I have to remove the Octo SPI RAM
The board can be populated with a Quad SPI PSRAM, sharing OCTOSPI1. Do I need to remove the OctoSPI before using the Quad SPI or is it enough to disconned CS?
Some help with the settings of the SDIO Pins.
How I understand from this schematics: PC8 and PD2 have pull-up resistors connected to them while the rest of them don't, this means that the rest should get Pull-up resistor in the settings of the GPIO and this will enable the pull-up resistor from ...
RMII GPIO state after HAL_ETH_Init()
Hi,we have a PHY with several bootstraps. Some of them are shared with the RMII from a STM32H753 (see image below, controller is on the left).A FreeRTOS+TCP network stack is used, which, when rebooted, first does some low level inits with HAL_ETH_Ini...
Resolved! JTAG and UART connectivity
Hello,We working on custom board. We using this controller STM32745IIkx. In JTAG we connect the USART1 port, but there is pin mapping issue, so I am unable to use USART1.So instead of UASART1 can I use USART2.I am sharing its schematic THE VCP_TX and...
Hi, I bought a Nucleo STM32F401RE board. Yeasterday the board was working fine in dimming led in A0 pin which was configured in PWM mode. Now I can't reprogram the board. See details for error message. PS. I'm a total beginner with microcontrollers
Starting server with the following options: Persistent Mode : Disabled Logging Level : 1 Listen Port Number : 61234 Status Refresh Delay : 15s Verbose Mode : Disabled SWD Debug : Enabled InitWhile...
