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Maximum CPU Cycle for Which attempt to read the same flash memory bank stalls the bus.

Akash Saini
Associate II

‎2024-01-05 2:45 AM

As per RM0456 Reference manual for STM32U5, any attempt to read the same flash memory bank stalls the bus. Can you please specify the maximum time/CPU clocks for which bus can be stalls.

AkashSaini_0-1704451547473.png

 

Thanks,
Akash Saini

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waclawek.jan
Super User

‎2024-01-05 5:06 AM

> Can you please specify the maximum time/CPU clocks for which bus can be stalls.

That depends on the operation on FLASH, for timing of those operations, see Flash memory characteristics chapter in datasheet.

JW

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