Ask questions and find answers on STM32Cube packages, including HAL, LL and middleware, and expansion software.
Dear STM32 Community, We believe that the example projects provided for the STM32Cube embedded software are a valuable resource when developing projects. We would like to better understand how developers use these examples in their workflow and e...
hello,I encountered a problem while developing for stm32u585. When the stm32 wakes up from standby mode, the HAL_RCC_OscConfig() function occasionally fails, "Wait till LSI is disabled" timeout in HAL_RCC_OscConfig() (this project uses IWDG)The speci...
I am developing a custom embedded device that uses PIMA with USBX in order to access the SD card contents of my PCB from a PC through USB.When UX_PIMA_WITH_MTP_SUPPORT is enabled, the device is correctly detected by Windows and communication works pr...
If the user uses "-Wundef" the header "stm32u3xx_hal_def.h" creates a lot of warnings due to a missing check if a preprocessor macro is defined before evaluating it.The warning gets emmited by the following #ifs used in STM32Cube FW_U3 V1.3.0 inside ...
Environment:Board: STM32H7S78-DKMCU: STM32H7S7L8H6Stack: AzureRTOS USBX (PIMA MTP + CDC ACM) + FileX.Storage: microSD Card.Host OS: Windows 11 Preliminary Note:A significant portion of this code is adapted from the official ST example:stm32-usbx-exam...
Hello,I want to generate an arbitrary waveform by a timer using DMA. The waveform is using different pulse widths and also varying periods in multiples of 25µs.By reading AN4776 and HAL documentation I figured out it should be possible with HAL_TIM_D...
Here is the config:mcu stm32h743iit6flash 4 lines 1 bank 32mb W25Q256JVsdram 32mb W9825G6KHhere is the flow 1 read image background from qspi 2 decode image with axi sram at #define JPEG_WORKSPACE_BASE 0x24040000 // AXI SRAM (fast) #define JPEG_WO...
Hello,I am currently working on a simple USB Power Delivery test project using the STM32G071C8.The system has two USB Type-C ports.I need to detect PDO information and eMarker capabilities in order to determine the appropriate power delivery behavior...
Hello. STM32H5I'm used to cache operations using memory barriers (ISB/DSB), but looking at a function like HAL_ICACHE_Invalidate() or HAL_DCACHE_Invalidate() I can't find any. Are memory barriers not needed with STM32 ICACHE/DCACHE?
I am a beginner in electronics. I recently designed a board using the STM32F407VGT6 and DP83848, but after assembly and testing, I encountered a problem. The board can be programmed and it runs, but the Ethernet section does not work properly. It d...
I am working with the STM32H723ZG and trying to implement Ethernet communication without using an RTOS using LWIP(TCP/IP) Setup Details: Board: NUCLEO-H723ZG IDE: STM32CubeIDE v1.19.0 Ethernet stack: LwIP PHY interface: RMII Flashing tool: ST-L...
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