Confused with the NJTRST signal role in JTAG debug

[ELI_HAIT]

Hello,

I am currently working on a schematic featuring 3x STM32H753ZIT6 MCU , and I have a few questions regarding the JTAG implementation:

(1)  From what I’ve gathered from various sources, the NJTRST signal is a JTAG ENABLE, meaning that in normal operation mode it must be tied to GND and driven to '1' only for JTAG debug. However, in some implementations on internet i've actually seen it connected to a pull-up resistors.

What is correct?

(2)  I need to daisy-chain the JTAG between three components for debugging via an external channel. Does the NJTRST synchronize the three components for this purpose? In other words, should it be connected in parallel?

(3)  And what about the NRST signal? Is it also used to synchronize the three components during JTAG debugging, or is it unrelated to this chain?

Thanx

Eli

[jiangfan]

Role in JTAG

In a JTAG chain, NJTRST is used to reset the JTAG TAP controller inside the target device. When asserted low, it forces the TAP state machine into a known reset state.

What it does

• Initializes or reinitializes the JTAG interface logic
• Resets the TAP controller state machine
• Helps recover the debug port if JTAG is stuck in an unknown state

What it does not do

• It is not the same as the main device reset pin like nRESET
• It usually does not reset the whole MCU/system
• It mainly affects the JTAG debug logic, not necessarily the CPU core or peripherals

In STM32 and many ARM chips

For STM32 and other ARM-based MCUs:

• NJTRST is optional in many designs
• It may be available on a pin that is shared with another function
• The signal is often used by external debug tools, but many applications can work without routing it

Typical JTAG pins

A standard JTAG interface includes:

• TCK — test clock
• TMS — test mode select
• TDI — test data in
• TDO — test data out
• NJTRST — TAP reset, active low
• nRESET — system reset, often separate from JTAG

Practical notes

• If NJTRST is not used, it is commonly pulled high so the TAP is not held in reset.
• If present, it should not be left floating.
• Some debuggers can operate with only the minimum JTAG pins and nRESET.