U3 / WBA. privileged read/write region that is readonly otherwise, without using MPU ?

[Thomas Roell]

The issue feels really simple, and it's easy to do on N6.

At the core, I am running out of MPU regions as there are only 8 available. So it would be nice to have a small chunk of SRAM, where privileged code can share data with unprivileged code. Say a status or something like this.

GTZC only controls both read and write. So I cannot say that a single 512 byte block is read/write for privileged code, but read only for unprivileged. 

[Bubbles · Accepted solution]

Hi @Thomas Roell,

it's not their primary function, but I have the impression that you could use the TAMP backup registers for this purpose.

And thank you for the feedback about the MPU. I'll see if we can do something about that in future products.

BR,

J

[Thomas Roell]

Thank you, that is a good idea using the TAMP backup registers. At the end of the day for my purpose the critical part is really something like a "current task" and a "current TLS" pointer, so not a lot.

Yes, the number of MPU regions in the CM33 based products is a real problem. 8 regions is just not enough to do anything bejond the bare minimum (excution prevention and private stack per task). 

[Bubbles]

Hi @Thomas Roell ,

I brought the MPU question up at a meeting and indeed, this deficiency was acknowledged. We are adding more MPU regions to some future products.

BR,

J