Posted on April 03, 2018 at 23:17hello everybody,
I want to program a clock at 210 Mhz on a stm32f7xx. My parameters are:
HSI RC (16 Mhz) used
PLL Source Mux , PLLM = /8, PLLN = * 210 , PLL /P = /2 , PLL /Q = 9 ( used for SD)
System Clock Mux PLLCLK , AHB = 1 So HCLK = 210 Mhz
Also APB1 prescaler = 4 and
APB2 prescaler = 4.
I use the standard library for stm32f7xx take on GITLAB do by decha.
The library is good, but i have a problem. I can not choice the input System Clock Mux PLLCLK on the system clock mux.
I checked in the register, and the bits is good (RCC clock configuration register (RCC_CFGR)) but it not running.
the code is
RCC_PLLCmd(DISABLE);
RCC_PLLI2SCmd(DISABLE);
RCC_PLLConfig(RCC_PLLSource_HSI, 8, 210, 2, 9);
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK1Config(RCC_HCLK_Div4);
RCC_PCLK2Config(RCC_HCLK_Div2);
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
RCC_PLLCmd(ENABLE);
RCC_PLLI2SCmd(ENABLE);
RCC_RTCCLKCmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_HSIRDY) == RESET){};
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET){};
RCC_GetClocksFreq(&PeriphClk);
SrcClk1 = RCC_GetSYSCLKSource();
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); the bit in the register is good, but the src is not good, the clk is not running goog???
Can you help me,
thank
S.T
