How to enable the ART accelerator on STM32F76x processors?

[LMore.5]

I'm wondering if the following is correct for using the ART flash accelerator on the STM32F7 line:

1. Change linker script to use the ITCM instead of the AXIM bus for FLASH memory.
2. In the startup code, enable the ART accelerator by setting the ARTEN bit of the FLASH_CR register.
3. Do I need to do anything to the Flash Latency Registers or should I keep it at the recommended level for my processor clock/voltage (6ws for 200mhz @ 3.3v)

We don't program the flash from application, so is it best to use ITCM with ART or AXIM and enable caching?

[Tesla DeLorean]

https://community.arm.com/iot/b/internet-of-things/posts/a-smart-architecture-boosting-performance-while-preserving-determinism

https://www.st.com/resource/en/application_note/dm00169764-stm32f7-series-system-architecture-and-performance-stmicroelectronics.pdf

@Sylvie Boube-Politano​ 

[LMore.5]

I think I've got it now:

1. Change the linker script as above to use the ITCM.
2. Enable the ART (ARTEN) in the FLASH_ACR Register
3. Enable the ART Prefetch Enable flag (PRFTEN) in the FLASH_ACR Register

For future people: you leave the Flash Latency set as described in the reference manual.

The second half of the dm above helped a lot, plus finding and studying the matching code at:

https://www.st.com/content/my_st_com/en/products/embedded-software/mcu-mpu-embedded-software/stm32-embedded-software/stm32cube-expansion-packages/x-cube-32f7perf.license=1632426327818.product=X-CUBE-32F7PERF.version=4.0.0.html

[Tesla DeLorean]

>>For future people: you leave the Flash Latency set as described in the reference manual.

Yes, because the flash array has a fixed (slow, say 35ns) speed which needs to be accommodated in CPU clock cycles, that the synchronous design also uses for the ART and FLASH interfacing logic.