STLink-V2 - State of SWCLK and SWDIO Without VTref Voltage

[hari_kumar]

Hi everyone,
I’m using an STM32F207ZGT6 with an STLink-V2 connected to a Raspberry Pi 5 for programming. The VTref, SWCLK, SWDIO, NRST pins of STLink-V2 are connected to the controller board. VTref is coming from the controller board.
Once the programming is completed, the power supply to the controller board is turned off, so the VTref (target voltage) is removed, while the STLink remains powered and connected to the Raspberry Pi 5.

In this condition, what happens to the SWCLK, SWDIO, and NRST pins of the STLink-V2?

Do they go to a high-impedance state, or
Are they held at some defined logic level (high/low)?

I want to understand if there will be any unwanted signals or voltages present on these lines when the target is unpowered.

Thanks in advance! :)

[Andrew Neil]

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[hari_kumar]

Hi @AM 

Thank you for your response.

If the debugging session is closed and no VTref is present, is there any possibility that the target board could be back powered through the SWCLK or SWDIO lines?
Also, in this same condition (no VTref and no active debugging session), would it be safe to hot swap the target board? Specifically, is there any risk of unintended current flow or sparks due to residual voltages on SWCLK or SWDIO?

I appreciate your guidance on this.