Which DMA and CPU access combination is faster?

[CJans.1]

Hi,

I want to transfer DCMI data using DMA into SRAM and then process this with the CPU.

I'm using the STM32H743.

What will be faster:

A:

Using DMA1 or DMA2 to transfer data into SRAM1 or SRAM2 and access it with the CPU.

B:

Using DMA (MDMA?) to transfer data into AXI SRAM and access it with the CPU.

Which DMA transfer will be faster?

Which CPU access (SRAM1/2 or AXI SRAM) will be faster.

I will access the data with the CPU mostly sequential. So cached data would be a pre.

Will accessing SRAM1/2 be cached?

WIll accessing AXI SRAM be cached?

[FBL]

Hello @CJans.1​ ,

According to AN5020 section 3.2.4.1 STM32H7x3, STM32H742, STM32H725/735, STM32H730, and STM32H750 devices, I can find that accessing AXI SRAM is 64-bit AXI bus width. However, accessing SRAM1/2 is 32-bit bus. So, DCMI may theoretically access AXI SRAM faster. Nevertheless, changing bus matrix D2-to-D1 AHB result in slower transfer. Briefly, it would be better to use SRAM1/2 with DMA1/2.

Then, you transfer data from the CPU through MDMA to AXI SRAM if needed.

According to Datasheet, DCMI can achieve a data transfer rate up to 140 Mbyte/s using at 80 MHz pixel clock in 14-bit mode.