str71lib - RCCU_PLL2Config

sjo · ‎2007-03-07

Posted on March 07, 2007 at 14:52

sjo · ‎2007-03-07

Posted on March 07, 2007 at 11:44

Could ST confirm the following:

In the function RCCU_PLL2Config the FRQRNG bit should be set if the freq is above 3MHz.

PCU->PLL2CR = ( Tmp & ~RCCU_DX_Mask ) | ( New_Div | RCCU_FREEN_Mask ) | 0x40;

I also have a query with RCCU_PLL1Config:

This function seems to set the FREEN bit for frequencies above 3MHz, surely this should be setting the FREF_RANGE instead and always setting the FREEN bit.

Regards

sjo

kaouther · ‎2007-03-07

Posted on March 07, 2007 at 14:52

Hello Sjo,

Thanks for your inputs:

1- We confirm, in the function RCCU_PLL2Config the FRQRNG bit should be set when the PLL input frequency ''HCLK pin'' is in the range 3-5 MHz as specified in the reference manual.

2- Regarding the RCCU_PLL1Config function, we totally agree. For input frequency ''CLK2'' greater than 3MHz, the FREF_RANGE bit should be set rather than the FREEN bit. All these issues should be fixed in the next release of software library.

Thanks.