2024-07-01 3:47 PM
I've been using for a bit a SPC58 eval-board and i was wondering how to share global variables between the two cores. I searched around on the internet finding nothing useful. Is "volatile int" enough even for a rough and dirty data sharing or should I use something like SRAM and its shared memory location?
Solved! Go to Solution.
2024-07-10 3:08 AM
Hello Mark ,
take a look in SPC58xNxx_RLA TripleCore Test Application for start
yes , volatile is not enough.
you should create a sort of shared SRAM in application.ld and define :
// Define shared variables in shared SRAM
volatile int sharedvar __attribute__((section(".shared_sram")));
After checking , you should define a sort of SpinLock before accessing or writing it.
Best regards
Erwan
2024-07-10 3:08 AM
Hello Mark ,
take a look in SPC58xNxx_RLA TripleCore Test Application for start
yes , volatile is not enough.
you should create a sort of shared SRAM in application.ld and define :
// Define shared variables in shared SRAM
volatile int sharedvar __attribute__((section(".shared_sram")));
After checking , you should define a sort of SpinLock before accessing or writing it.
Best regards
Erwan
2024-07-11 5:02 AM
Hi Erwan,
thank you for answer.
How should I choose parameters for that section? I don't want to mess with already used memory partitions.
SPC58xNxx_RLA TripleCore Test Application does not implement data sharing between cores but only starting the additional cores and make the onboard LED blink. Are there any other sources from where I can get more info about this topic?
Thanks in advance, Mark
2024-07-11 7:44 AM
Hello Mark ,
Sorry , we have no example.
You have no choice you should update your linker script copy application.ld by user.ld
and try to create a shared ram data in user.ld
MEMORY
{
...........
shared_sram : org = tbd, len = 16k /* Define shared SRAM region */
...........
}
SECTION
{
.......
.shared_sram :
{
. = ALIGN(4);
*(.shared_sram)
. = ALIGN(4);
} > shared_sram
....
}
Best regards
Erwan
2025-01-19 9:55 PM
Hello Mark,
I am working on a similar task of sharing data between two cores. Did this solution work for you? If so, were there any challenges you encountered while implementing this approach?
Thanks in advance,
Rohit.
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